Electronic timepiece

ABSTRACT

An electronic timepiece having a digital display for displaying time in response to timekeeping signals applied thereto is provided. A time correcting circuit including a manually operated switch is coupled to an electronic divider circuit which supplies the timekeeping signals to the display to correct the count therein corresponding to at least one displayed digit of time. When the switch is displaced momentarily a first correction signal is provided which corrects the displayed digit by indexing the digit by one and when the switch is displaced for a sustained period of time a second correction signal is applied to the electronic divider circuit to thereby correct the same digit by repetitively indexing said digit.

United States Patent Naito [451 Dec. 30, 1975 ELECTRONIC TIMEPIECE [75] Inventor: Okito Naito, Suwa, Japan fgfgfgfgz gr fi wi s [73] Assignee: Kabushiki Kaisha Seikosha, Tokyo, Attorney, Agent, or Firm-Blum, Moscovitz, Friedman Japan & Kaplan [22] Filed: Jan. ll, 1974 [57] ABSiRACT [2H Appl 43272l An electronic timepiece having a digital display for displaying time in response to timekeeping signals ap- [30] Foreign Application Priority Data plied thereto is provided. A time correcting circuit in- Jan. 12, 1973 Japan 48-59ll cludmg a manually Pemed switch is electronic divider circuit which supplies the timekeep- 52 us. Cl 58/23 R; 58/855 signals F the Play f 99 ""i' [51] Int. Cl. 604C 3/00 correspond'ng m at least one dsplayed of [58] Field of Search 58/23 R, 50 R, 85.5 '9 W is 4 m? 'mmmarily a fi rectlon signal [5 provided which corrects the displayed 5 References Cited digit by indexing the digit by one and when the switch UNITED STATES PATENTS is displaced for a sustained period of time a second correction signal is applied to the electronic divider 3; 2 et circuit to thereby correct the same digit by repetitively p 1 5/l973 Hiraga et al. 58/855 Indexing Said dlgn' 3,756,011 9 1973 Nishimura et al. six 35.5 5 Claims. 4 Drawing Figures US Patent Dec. 30, 1975 Sheet 2 of2 3,928,959

ELECTRONIC TIMEPIECE BACKGROUND OF THE INVENTION This invention relates generally to small-sized electronic timepieces having digital displays and especially to an electronic wristwatch having a correction circuit which is adapted to provide two manners of correcting a single digit utilizing a single switch.

Correction circuits in electronic timepieces wherein each digit is displayed such as hours, minutes and seconds and wherein each digit can be independently corrected are well known. In such timepieces each digit is indexed by one to thereby change the time by separately correcting hour, minute or second digits.

Still another type of correction mechanism in digital display electronic timepieces, known as a quick-feed, is to provide a high frequency signal to the divider circuit and advance each digit at a multiple of its normal advancement rate. Another correction method involves the correction of all digits except seconds, the seconds digits being set to zero by a correction switch and restarted when the switch is released at a reference time. Each of the above mentioned methods of correction, while providing certain advantages is less than completely satisfactory. For example, in an electronic timepiece wherein each digit is independently corrected by indexing same by one, if a minute is incorrect it might be necessary to index the minute digit 59 times to obtain a corrected value. Similarly when the quick-feed operation is utilized errors in setting frequently occur due to the speed of indexing. Accordingly, it is desired to provide an electronic timepiece having a digital display which eliminates the above-mentioned disadvantages.

SUMMARY OF THE INVENTION Generally speaking, in accordance with the invention, an electronic wristwatch having an oscillator for producing a high frequency time standard signal, an electronic divider circuit for receiving the high frequency time standard signal and providing low frequency timing signals, a digital display for displaying time in response to such low frequency timing signals is provided. At least one manually operated correcting switch associated with at least one digit of time displayed is coupled through a correcting circuit to an electronic divider circuit stage corresponding to the digit to be corrected. The correcting circuit is further adapted to receive the output signal of a divider stage of a higher frequency than the frequency of the divider stage to be corrected. Displacement of said correction switch indexes said corresponding divider stage to correct the digit corresponding thereto by one. Sustained displacement of the correcting switch for a certain period of time effects a quick-feed correction of the digit by applying the high frequency signal applied to the correcting circuit to the divider stage corresponding to the digit to be corrected.

Accordingly, it is an object of this invention to provide an improved digital display wristwatch wherein a single correction switch provides two diverse type correcting operations of a single digit.

Another object of this invention is to provide an improved digital display electronic timepiece wherein the same swtich is used to correct the time displayed by indexing same and/or quick-feeding signals thereto.

Still another object of this invention is to provide an improved electronic wristwatch having a digital display wherein correction of a digit is effected in a highly practical manner.

Still other objects and advantages of the invention will in part be obvious and will in part be apparent from the specification.

The invention accordingly comprises the features of construction, combination of elements and arrangement of parts which will be exemplified in the construction hereinafter set forth, and the scope of the invention will be indicated in the claims.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of an electronic wristwatch including the improved correction switch and circuit corresponding thereto constructed in accordance with the instant invention;

FIG. 2 is a timing diagram of the correction signal applied by the correcting circuit depicted in FIG. 1;

FIG. 3 is a circuit diagram of one embodiment of the correction circuit depicted in FIG. I; and

FIG. 4 is a timing diagram of the signals produced by the control circuit depicted in FIG. 3.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring now to FIG. I, an electronic timepiece having a conventional digital display 2 for displaying numerals representative of hours, minutes and seconds is depicted. Each digit of the display may, by way of example, take the form ofa seven bar display. An oscillating circuit 1, which includes a quartz crystal vibrator, is coupled to an electronic divider circuit 3 for applying high frequency time standard signals thereto. The electronic divider circuit 3 consists of a multi-stage divider chain capable of counting seconds, minutes and hours and producing, as an output, timing signals representative of present time as reflected by the count in the respective divider stages. The electronic divider circuit includes suitable decoder and driving circuits so that the timing signals are capable of driving display 2. The output of the electronic dividing and driving circuit 3 is applied to digital display 2 which provides a digital display of time.

A correcting circuit 7 consisting of a logic switching circuit depicted in FIG. 3 is capable of being actuated by manually operated switch 5 coupled thereto and is coupled to the divider stage which counts minutes. The correcting circuit is further coupled to another stage of the dividing and driving circuit 3 to receive a signal having a higher frequency, 8 Hz, than the minute signal. Manually operated correction switches 4, 5 and 6, provided for the correction of hours, minutes and seconds respectively are two position switches which are spring biased to be open in normal operation. The common terminal of hour correction switch 4 and second correction switch 6 are coupled to the respective divider stages for counting such digits. Minute correction switch 5 is coupled through correction circuit 7 which couples said minute correcting switch 5 to the minute divider in the manner hereinabove described. Correction of hours, minutes and seconds may be achieved by indexing the count of the associated divider stages by one upon a closing of the manually operated switches 4, 5 and 6. Further, if switch 5 is maintained in a closed position for more than 2 seconds, the correcting circuit applies the 8 Hz signal from the higher frequency stageto the minute divider stage in order to rapidly advance same. Thus, the correcting circuit 7 is changed over to apply an 8 Hz signal and the minute digit is more rapidly indexed until the correct digit is displayed, at which time the switch 5 would be opened to thereby terminate correction of the digit. It is appreciated that when the minutes display is incorrect by a few minutes it is only necessary to index same by rapidly deflecting switch 5 to thereby effect correction. Alternatively, when the minutes display is incorrect by more than just a few digits, the increased frequency will more rapidly make the necessary correction, it being a desirable expedient to stop the high speed indexing of the minute digit in advance of the correct digit and complete the exact correction of the digit by returning to the indexing by one mode of operation. The signals applied to the minute digit counter are depicted in FIG. 2.

Depicted in FIG. 3 is an electronic circuit which is adapted to control a time correcting input such as would be utilized in correcting circuit 7 depicted in FIG. 1. A four stage flip-flop which is adapted to divide a signal by 24, supplies an output signal thereof to a D-type flip-flop which has a memory cycle of 2 seconds, which in turn applies output signals to AND gates a and 10b which have common outputs to a NOR gate to provide a gating circuit. A microswitch input for minutes correction is applied to the reset terminal of the four stage flip-flop and is further supplied to the reset terminal of the D-flip-flop as well as to one input of AND gate 10b. Similarly the 8 Hz output besides being applied as the input to the four stage flip-flop is further applied to AND gate 10a and is gated by the D-type flip-flop. The wave-forms of the circuit are illustrated in FIG. 4.

It is understood that although the preferred embodiment illustrated herein shows an apparatus for correcting minutes, it is possible to use such correcting apparatus for seconds, hours, days, dates, etc.

It will thus be seen that the objects set forth above, among those made apparent from the preceding description, are efficiently attained and, since certain changes may be made in the above construction without departing from the spirit and scope of the invention, it is intended that all matter contained in the above description or shown in the accompanying drawings shall be interpreted as illustrative and not in a limiting sense.

It is also to be understood that the following claims are intended to cover all of the generic and specific features of the invention herein described, and all statements of the scope of the invention which, as a matter of language, might be said to fall therebetween.

What is claimed is:

1. An electronic timepiece having a multi-digital display and comprising oscillator means for generating a relatively high frequency time standard signal; an electronic divider means having a plurality of stages coupled to said oscillator means and adapted to supply low frequency signals to said digital display that are representative of present time in response to said high frequency time standard signal, an intermediate stage of said divider means producing an intermediate frequency correction signal, correction circuit means for receiving said intermediate frequency correction signal from said intermediate stage of said electronic divider means, means for producing an index correction signal including one manually operated correction switch coupled to said correction circuit means, said correction means applying said index correction signal to a second divider stage associated with at least one displayed digit of time to be corrected to index the count of said stage by one when said switch is maintained in an operative position for less than a predetermined interval, and to apply said intermediate frequency correction signal to said second divider stage when said switch is maintained in said position in excess of said interval to repetitively index said digit.

2. An electronic timepiece having a digital display as claimed in claim 1, wherein said manually operated switch is a two position switch.

3. An electronic timepiece as claimed in claim 1, said index correction signal producing means including at least one further correction switch coupled to a third stage of said electronic divider means for correcting the count of said third stage and hence the one digit associated therewith by indexing said stage by one.

4. An electronic timepiece as claimed in claim 1, wherein said correcting circuit means includes a multistage flip-flop for providing an interval signal which determines said interval in response to a time coincident application of said intermediate frequency correction signal and said switching signal, and gating circuit means having applied thereto said interval signal, said intermediate frequency correction signal and said switching signal, said gating means being adapted to provide to said digit to be corrected said intermediate frequency correcting signal in response to the time coincident application of said interval determining signal and said intermediate frequency correction signal and being further adapted to provide said index correction signal being applied in the absence of said interval signal at the input of said gating circuit means.

5. An electronic timepiece as claimed in claim 4, wherein said gating circuit means includes a flip-flop for providing a first and second complementary output signal in response to the time coincidental application of said switching signal and said interval signal, output gate means for supplying said digit correction signal to said digit to be corrected, the correction signals applied thereto being inverted thereby, and first and second gating means adapted to receive said first and second complementary output signals respectively as a first input, said first gating means being adapted to receive as a second input said intermediate frequency correction signal and upon coincidence in the state of said signals applied thereto applies said intermediate frequency correction signal to said output gate means and said gating means having as its other input said switching signal and upon coincidence in state passing said index correcting signal to said output gating means.

l f I l UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION PATENT NO. 3,928,959 DATED December 30, 1975 INVENTORUQ Okito Naito It ts certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown betow:

On the title page, the Assignee should read --Kabushiki Kaisha Suwa. Seikosha--.

Signed and Scaled this A ttes t:

RUTH C. MASON C. MARSHALL DANN Arresting Officer Commissioner uj'larenls and Trademarks 

1. An electronic timepiece having a multi-digital display and comprising oscillator means for generating a relatively high frequency time standard signal; an electronic divider means having a plurality of stages coupled to said oscillator means and adapted to supply low frequency signals to said digital display that are representative of present time in response to said high frequency time standard signal, an intermediate stage of said divider means producing an intermediate frequency correction signal, correction circuit means for receiving said intermediate frequency correction signal from said intermediate stage of said electronic divider means, means for producing an index correction signal including one manually operated correction switch coupled to said correction circuit means, said correction means applying said index correction signal to a second divider stage associated with at least one displayed digit of time to be corrected to index the count of said stage by one when said switch is maintained in an operative position for less than a predetermined interval, and to apply said intermediate frequency correction signal to said second divider stage when said switch is maintained in said position in excess of said interval to repetitively index said Digit.
 2. An electronic timepiece having a digital display as claimed in claim 1, wherein said manually operated switch is a two position switch.
 3. An electronic timepiece as claimed in claim 1, said index correction signal producing means including at least one further correction switch coupled to a third stage of said electronic divider means for correcting the count of said third stage and hence the one digit associated therewith by indexing said stage by one.
 4. An electronic timepiece as claimed in claim 1, wherein said correcting circuit means includes a multi-stage flip-flop for providing an interval signal which determines said interval in response to a time coincident application of said intermediate frequency correction signal and said switching signal, and gating circuit means having applied thereto said interval signal, said intermediate frequency correction signal and said switching signal, said gating means being adapted to provide to said digit to be corrected said intermediate frequency correcting signal in response to the time coincident application of said interval determining signal and said intermediate frequency correction signal and being further adapted to provide said index correction signal being applied in the absence of said interval signal at the input of said gating circuit means.
 5. An electronic timepiece as claimed in claim 4, wherein said gating circuit means includes a flip-flop for providing a first and second complementary output signal in response to the time coincidental application of said switching signal and said interval signal, output gate means for supplying said digit correction signal to said digit to be corrected, the correction signals applied thereto being inverted thereby, and first and second gating means adapted to receive said first and second complementary output signals respectively as a first input, said first gating means being adapted to receive as a second input said intermediate frequency correction signal and upon coincidence in the state of said signals applied thereto applies said intermediate frequency correction signal to said output gate means and said gating means having as its other input said switching signal and upon coincidence in state passing said index correcting signal to said output gating means. 